Dec 13, 2017 05:42 AM
(This post was last modified: Dec 13, 2017 06:53 AM by misterfail88.)
Hi,
I have a problem with Makefile. He which should compile .c file to an object file only if a .c file has been modified.
But i have an error when i use "all" rule :
When i use manually it's works :
My work directory :
Makefile content :
If you have some idea i'll take it 😁
Thx
'/' missing
$(OBJ_PATH)%.o: $(SRC_PATH)%.c ==> $(OBJ_PATH)/%.o: $(SRC_PATH)/%.c
I have a problem with Makefile. He which should compile .c file to an object file only if a .c file has been modified.
But i have an error when i use "all" rule :
Code
make: *** No rule to make target `obj/main.o', needed by `ft_ls'. Stop.When i use manually it's works :
Code
clang -Wall -Wextra -Werror -Iinclude -o obj/main.o -c src/main.cMy work directory :
Code
Makefile include/*.h libft/libft.a src/*.cMakefile content :
Code
NAME = ft_ls
SRC_PATH = src
OBJ_PATH = obj
CPPFLAGS = -Iinclude
LDFLAGS = -Llibft
LDLIBS = -lft
CFLAGS = -Werror -Wall -Wextra
CC = clang
SRC_NAME = main.c\
ft_type.c\
ft_right.c\
ft_putright.c\
ft_date_converter.c
OBJ_NAME = $(SRC_NAME:.c=.o)
SRC = $(addprefix $(SRC_PATH)/,$(SRC_NAME))
OBJ = $(addprefix $(OBJ_PATH)/,$(OBJ_NAME))
all: $(NAME)
$(NAME): $(OBJ)
$(CC) $(LDFLAGS) $(LDLIBS) $^ -o $@
make -C libft
$(OBJ_PATH)%.o: $(SRC_PATH)%.c
@mkdir $(OBJ_PATH) 2> /dev/null || true
$(CC) $(CFLAGS) $(CPPFLAGS) -o $@ -c $<
clean:
rm -fv $(OBJ)
make -C libft clean
@rmdir $(OBJ_PATH) 2> /dev/null || true
fclean: clean
rm -fv $(NAME)
make -C libft fclean
re: fclean all
.PHONY: all, clean, fclean, reIf you have some idea i'll take it 😁
Thx
'/' missing
$(OBJ_PATH)%.o: $(SRC_PATH)%.c ==> $(OBJ_PATH)/%.o: $(SRC_PATH)/%.c
From C137

